Hello everyone, so today I’m going to talk about JTAG. so, what is a JTAG?

Well, JTAG is an IEEE standard (1149.1) developed in the 1980s to solve electronic boards manufacturing issues. But now, it is most often used as programming, debug and probing port.

So, this is a figure of industrial PCB(printed circuit boards). So you can see there are many copper paths connecting different ICs(integrated circuits) and other components.

In this figure, we can see that, there are nearly thousands of paths connecting each ICs. So, there is a chance that there will be a defected PCB while manufacturing PCBs. How can we find those boards?

Ok, for example, lets think there is a PCB with one CPU and a one FPGA, with 4 connections only as follow.

image from: www.fpga4fun.com/JTAG1.html

So, in reality, there are thousand of connections in between each ICs. To make sure, this connections are fine, we use JTAG. JTAG was created for this work.

 image from: www.fpga4fun.com/JTAG1.html

JTAG can hijack all pins of ICs. In this figure, JTAG will make all pins of CPU to output and all the pins of FPGA to inputs. Then send some data form CPU to FPGA.So JTAG can make sure board connections are fine. This is call an “IC boundary test”.

JTAG really consists of TDI, TDO, TMS and TCK logic signals. From PC side, it is 3 outputs and 1 input as shown in bellow figure,

 image from: www.fpga4fun.com/JTAG1.html

TMS and TCK are parallel connected with CPU and FPGA as follow.

 image from: www.fpga4fun.com/JTAG1.html

Then, the TDI and TDO are connected as a chain, as follow.

 image from: www.fpga4fun.com/JTAG1.html

So, each IC has fore pins to connect to JTAG. Sometimes, a fifth pin, TRST is used to JTAG reset purposes. It is optional. Usually, JTAG pins are dedicated.

So, this boundary testing is the original reason which JTAG was created. All big ICs use JTAG for boundary testing.

But now, JTAG is also use as debug port, also the FPGA manufacturers allow configure the FPGA through the JTAG and use the JTAG signals inside the FPGA core.

references: http://www.fpga4fun.com/JTAG2.html

***Please note that all of the content on this post was originally published on champlnx.blogspot.com. We have migrated these posts to www.champlnx.com for your convenience and continued access.

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